PicoNut Manual
v1.1.0-1-g579c

PicoNut Manual

  • The PicoNut Project
  • Getting Started
  • Nucleus Variants
  • Membrana Variants
  • Peripherals
  • Interface Definitions
    • IPort/DPort Interface
    • CSR Bus
    • Wishbone Systembus
    • Software-Simulated Hardware
  • Software
  • Debugging
  • Interrupt Implementation
  • Simulator
  • Supported Boards

For Contributors

  • Project Structure and Build System
  • Code Style Guidelines
  • How to Document
  • Docker
  • RISC-V Test Framework (RISCOF)
  • Embedded RAM Templates

Appendix

  • Building the RISC-V GNU Toolchain
  • Udev Rules for Supported Boards
PicoNut Manual
v1.1.0-1-g579c
  • Interface Definitions
  • View page source

Interface Definitions

  • IPort/DPort Interface
    • Data Port (DPort)
    • Instruction Port
    • Data port and instruction port signals
    • Modes of operation
    • Timing diagrams
    • A-Extension
  • CSR Bus
  • Wishbone Systembus
    • Overview
    • Wishbone Read
    • Wishbone Write
    • Wishbone Byte Select
  • Software-Simulated Hardware
    • Overview
    • Features
    • Getting Started
    • Library Components
    • c_soft_peripheral
    • c_soft_memory
    • c_soft_uart
    • Peripheral Interface
    • ELF Reader
    • Troubleshooting
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© Copyright Lukas Bauer, Alexander Beck, Daniel Dakhno, Sebastian Ebenhöh, Martin Erichsen, Johannes Fleiner, Johannes Hofmann, Claus Janicher, Tristan Kundrat, Eikya Lagisetti, Marco Milenkovic, Beaurel Ingride Ngaleu, Niklas Sirch, Lorenz Sommer, Daniel Sommerfeldt, Christian Zellinger, Prof. Dr. Gundolf Kiefer, Michael Schäferling 2026-04-30.

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