GPIO

Author: Daniel Sommerfeldt 2026, Johannes Hofmann 2026

Module

class m_gpio

GPIO peripheral module.

This module implements a configurable General Purpose Input/Output (GPIO) controller with a Wishbone slave interface for register access.

Ports:

Param clk:: [in] Clock of the module
Param reset:: [in] Reset of the module
Param wb_slave:: [inout] Wishbone slave interface
Param input:: [in] GPIO input (Bits after num_inputs are ignored)
Param output:: [in] GPIO output port (Bits after num_outputs are ignored)

Configuration and Registers

enum e_gpio_regs

GPIO register offsets.

The GPIO module follows the register layout of a SiFive GPIO module. See SiFive FE310-G000 Manual for detailed documentation.

Enumeration of all GPIO register offsets relative to the GPIO module base address.

Offset	Register	Access	Description
0x00	GPIO_REG_INPUT_VAL	R	Input bank value
0x04	GPIO_REG_INPUT_EN	R/W	Input bank enable
0x08	GPIO_REG_OUTPUT_EN	R/W	Output bank enable
0x0C	GPIO_REG_OUTPUT_VAL	R/W	Output bank value

Values:

enumerator GPIO_REG_INPUT_VAL = 0x00

enumerator GPIO_REG_INPUT_EN = 0x04

enumerator GPIO_REG_OUTPUT_EN = 0x08

enumerator GPIO_REG_OUTPUT_VAL = 0x0C

PN_CFG_GPIO_BASE_ADDRESS

Base address of the GPIO module.

This macro defines the memory-mapped base address where the GPIO registers are located. It can be overridden by defining PN_CFG_GPIO_BASE_ADDRESS before including this header.

Default value: 0x40000000

GPIO_SIZE

Total addressable size of the GPIO module.

Defines the memory span occupied by all GPIO registers (16 bytes).

GPIO_MAX_PINS

Maximum number of GPIO pins per bank.

Specifies the maximum number of individual GPIO pins that can be controlled in a single GPIO bank. Also determins the max width of the GPIO registers interfaced by the wishbone bus.

GPIO_WB_ADR_WIDTH

Wishbone bus address width in bits.

Specifies the width of the address bus used by the Wishbone interface to communicate with the GPIO module.

Driver

enum gpio_status_t

Status codes returned by GPIO driver functions.

Values:

enumerator GPIO_OK = 0: Operation successful.

enumerator GPIO_ERR_INVALID = -1: Invalid argument (e.g. null pointer).

gpio_status_t gpio_init(gpio_t *self, uintptr_t base_addr)

Initializes the GPIO peripheral.

Parameters:

self – [inout] Driver instance.
base_addr – [in] Base address of the GPIO peripheral.

Returns:

GPIO_OK on success, otherwise error code.

gpio_status_t gpio_de_init(gpio_t *self)

Deinitializes the GPIO peripheral.

Disables the GPIO module by disableing all pins. The driver instance remains valid.

Parameters:: self – [inout] Driver instance.
Returns:: GPIO_OK on success, otherwise error code.

gpio_status_t gpio_read_input(gpio_t *self, uint32_t *value)

Read the input bank of GPIO peripheral.

Parameters:

self – [inout] Driver instance.
value – [out] Value of the input bank.

Returns:

GPIO_OK on success, otherwise error code.

gpio_status_t gpio_read_input_pin(gpio_t *self, uint8_t pin, bool *value)

Read one input pin of GPIO peripheral.

Parameters:

self – [inout] Driver instance.
pin – [in] Number of the pin to read.
value – [out] Value of the input pin (e.g. 0, 1).

Returns:

GPIO_OK on success, otherwise error code.

gpio_status_t gpio_write_output(gpio_t *self, uint32_t value)

Write the output bank of GPIO peripheral.

Parameters:

self – [inout] Driver instance.
value – [in] Value to write to the output bank.

Returns:

GPIO_OK on success, otherwise error code.

gpio_status_t gpio_write_output_pin(gpio_t *self, uint8_t pin, bool value)

Write one output pin of GPIO peripheral.

Parameters:

self – [inout] Driver instance.
pin – [in] Number of the pin to write.
value – [in] Value to write to the pin(e.g. 0, 1).

Returns:

GPIO_OK on success, otherwise error code.

struct gpio_t

#include <gpio_driver.h>

GPIO driver instance structure.

Public Members

uintptr_t base_addr: GPIO base address

Examples

Adding the GPIO Module to a toplevel design

// === top.h ===
#include <gpio.h>
// ...
SC_MODULE(m_top)
{
public:
    sc_in<GPIO_MAX_PINS> PN_NAME(gpio_input);
    sc_out<GPIO_MAX_PINS> PN_NAME(gpio_output);
// ...
m_gpio* gpio;
// ...
};

# === top.cpp
// ...
void m_top::init_submodules()
{
// ...
    // GPIO module with 8 input pins and 8 output pins
    gpio = sc_new<m_gpio>("i_gpio", PN_CFG_GPIO_BASE_ADDRESS, 8, 8);

    gpio->reset(reset);
    gpio->clk(clk);

    gpio->input(gpio_input);
    gpio->output(gpio_output);

    pn_interconnect->add_module(gpio);
// ...
    pn_interconnect->elaborate();
}
// ...

Turn LED on

#include <gpio_driver.h>

#define LED0 0

gpio_t gpio;
gpio_init(&gpio, PN_CFG_GPIO_BASE_ADDRESS);

gpio_write_output_pin(&gpio, LED0, 1);